The company said the device, built using 50 nm class process technology, has 60% higher productivity compared to DDR2 devices of an equivalent density. It said the small form factor enables up to 8 GB of memory chips for registered in-line memory modules (RIMMs), as well as 4 GB for small outline dual in-line memory modules (SODIMMs) and unregistered in-line memory modules (UDIMMs).

The company expects the 50 nm process used to manufacture the 2 GB DDR3 will become its primary dynamic random access memory (DRAM) process technology next year.

The company entered the DRAM market with the introduction of a 150 nm-class DRAM technology in 2000. Earlier this month, it unveiled a DRAM model that can be used in mobile devices such as smartphones. In April, it started volume production of 1 GB DDR2 using 50 nm-class process technology.

Jim Elliott, vice president of memory at Samsung Semiconductor, said: "We have focused on maximising density alternatives and power savings to make our 2 GB DDR3 solution as flexible as possible for designers."

Source: Computergram